Analysis of the Market Prospects of ALD Atomic Layer Deposition Equipment in the Semiconductor Field

ALD (Atomic Layer Deposition) technology is a thin film deposition method based on surface self-limiting chemical reactions. Its core principle is to alternately introduce two or more gaseous precursors into the reaction chamber, causing the reactants to chemically adsorb on the substrate surface and form a single-atom layer film. Precise thickness control (with an accuracy of up to 0.1nm) is achieved through cyclic deposition. This "self-limiting" feature endows ALD with three core advantages: atomic-level film uniformity (uniformity within the wafer <1%), 100% step coverage (adapted to high aspect ratio structures), and precise control of material composition, making it an irreplaceable key technology in semiconductor manufacturing.

In the semiconductor industry, the application of ALD technology runs through the entire chip manufacturing process: From the High-k dielectric layer of logic chips (replacing traditional SiO₂ to solve leakage problems), metal gates (such as TiN and Ru electrodes), to the 3D NAND stacked capacitor dielectric layer of memory chips (breaking through the stacking bottleneck of over 200 layers), and the isolation layer of DRAM memory cells Then comes the advanced packaged TSV through-hole insulation layer (ensuring the reliability of vertical interconnection). As the process node advances towards 3nm and below, the transistor structure evolves from FinFET to GAA (Full Surround Gate), and the demand for "atomic-level interface modification" in ALD technology becomes more prominent. For instance, in Samsung's 3nm GAA process, the AlO youdaoplaceholder0 /HfO₂ tandem deposited by ALD serves as the gate insulation layer, reducing the device's leakage rate by more than 50% while increasing the switching speed by 30%.

The development history of ALD technology can be traced back to the concept of "atomic layer epitaxial" (ALE) proposed by Finnish scientist Suntola in 1974. After 2000, with the semiconductor manufacturing process entering the 45nm node, the High-k/ metal gate process promoted the commercialization of ALD equipment. Nowadays, ALD has been upgraded from a single thin film deposition tool to a multi-functional platform integrating technologies such as plasma enhanced ALD (PE-ALD) and space atomic layer Deposition (SALD), supporting the semiconductor industry's breakthroughs in structural innovation and material diversification towards the "post-Moore era".

The current market situation and competitive landscape of global ALD atomic layer deposition equipment

Analysis of market size and growth trend

The global ALD equipment market is in a stage of explosive growth. The market size is expected to reach 6.8 billion US dollars in 2024, and the compound annual growth rate (CAGR) is projected to remain at 7.3% to 7.4% from 2025 to 2030. As the world's largest semiconductor manufacturing base, China's demand for ALD equipment is expected to grow by 37% in 2024 (far exceeding the global average of 15%). The market size is projected to exceed 1.413 billion US dollars in 2025 and is expected to account for more than 35% of the global market by 2030, becoming a core growth engine.

Table: Forecast of Global ALD Equipment Market Regional Distribution in 2025 (Excluding the United States)

The proportion (%) of regional market size (in billions of US dollars) is the main growth driver

China is expanding production and providing policy subsidies for 14.13, 20.5 and 14nm and above processes

Taiwan, China 12.5 18.4 TSMC's demand for advanced manufacturing processes (3nm/2nm)

South Korea 11.8 17.3 Samsung /sk Hynix 3D NAND/DRAM upgrade

On October 15th, Intel and Micron in North America rebuilt their local production capacity

On December 8, 8.7, the demand for automotive semiconductors and power devices in Europe increased

Other 10.67 15.7 Southeast Asia packaging and testing, expansion in emerging markets

The competitive landscape of major equipment suppliers

The global ALD equipment market is characterized by a competitive landscape where international giants dominate and domestic manufacturers are accelerating their breakthroughs. International leading enterprises have occupied over 80% of the market share by leveraging their technological accumulation and customer stickiness, while domestic manufacturers have achieved breakthroughs in mid-to-low-end processes through differentiation strategies.

Table: Comparison of Product and Technical Features of Core Suppliers of ALD Equipment

The core products of the enterprise, technological advantages, market share (2024), and major customers

ASM International Pulsar® 300/500 series single-chip devices support 3nm logic chips and have material compatibility with over 100 types, including TSMC and Samsung

Tokyo Electron (TEL) 's TFC Series batch equipment leads SK Hynix and Micron by 22% in DRAM/3D NAND production capacity efficiency

Applied Materials' AMAT Endura® ALD Plasma Enhanced Technology (PE-ALD) increases deposition rate by 3 times 25% Intel, Applied Materials

The competitive advantages of international giants are reflected in multi-chamber integration (such as ASM Pulsar® 500 supporting the simultaneous operation of six process chambers), yield control (defect rate <0.1 per square centimeter), and patent barriers (ASM holds over 2,000 core ALD patents). Domestic manufacturers, relying on cost advantages (with prices reduced by 25% to 30% after localization) and policy support (such as the "02 Special Project" R&D subsidies), are rapidly replacing imported equipment in fields like 14nm and above logic chips and power semiconductors.

The demand distribution of ALD equipment in the semiconductor industry chain

The demand for ALD equipment is highly concentrated in the semiconductor manufacturing process, and the technical requirements and market shares of different sub-sectors vary significantly:

<s:1> Logic chip: accounting for 42% of the demand for ALD equipment, it is the largest application scenario. In 3nm and below processes, the gate stacking of GAA transistors (such as HfO₂/AlO interface modification) and the source-drain contact layer (Co/W metal deposition) all rely on ALD technology. TSMC's 3nm process requires 15 to 20 ALD devices for each production line, an increase of 60% compared to the 7nm node.

Youdaoplaceholder7 Memory chips: 35%, 3D NAND and DRAM are the core driving forces. After the number of 3D NAND stacked layers exceeded 500, the alternating layers of SiO₂/SiN <e:1> deposited by ALD were used as charge trap layers, and the thickness uniformity of <0.5nm was required. The High-k capacitive dielectric layer of DRAM (such as ZrO₂) requires ALD equipment to support A low leakage current (<1e-8 A/cm²) process.

<s:1> Power semiconductors: accounting for 12%, the surface passivation layer (Al₂O₃) and gate oxide layer (SiO₂) deposition of SiC/GaN devices drive the demand for ALD. In the SiC production lines of domestic manufacturers such as Sida Semiconductor and Silan Microelectronics, ALD equipment has been domesticated and replaced.

Youdaoplaceholder6 Advanced packaging: Accounting for 8%, the deposition demand for the TSV through-hole insulating Layer (SiO₂) in 2.5D/3D packaging and the Cu diffusion barrier layer (TaN) of the RDL Redistribution Layer (redistribution layer) is growing rapidly, and the low-temperature ALD (<200℃) technology has become a research and development hotspot.

Other fields: MEMS sensors, optoelectronic devices, etc. account for 3%, and ALD technology is gradually penetrating into miniaturized and highly reliable devices.

Breakthroughs and innovation directions of Core technologies for ALD atomic layer deposition equipment

Key technical indicators and performance bottlenecks

The current technological competition in ALD equipment focuses on three core indicators, while also facing multi-dimensional performance bottlenecks:

Deposition rate: The deposition rate of traditional thermal ALD is only 0.1-1 nm/min, which is difficult to meet the requirements of mass production. Plasma-enhanced ALD (PE-ALD) can increase the rate to 5-10 nm/min by activating the precursor through plasma. However, high-energy plasma is prone to cause wafer damage, and the plasma density (1e10-1e11 cm⁻³) and bombardment energy (<10 eV) need to be optimized.

<s:1> Film uniformity: For 300mm wafers, the intra-wafer uniformity should be less than 1% and the inter-wafer uniformity less than 2%. The current equipment achieves the indicators by improving the gas distribution system (such as multi-zone spray heads) and temperature control (±0.1℃), but in high aspect ratio structures (>100:1), the difference in deposition rates between the bottom and the top still reaches 5%-8%.

<s:1> Wafer size compatibility: During the upgrade from 200mm to 300mm, the design of the vacuum chamber of the equipment and the mechanical transfer accuracy (<0.1mm) are facing challenges. The ALD equipment for 450mm wafers is still in the research and development stage and is expected to be commercialized after 2028.

In addition, the stability of the precursor delivery system (bubble control, flow accuracy ±0.5%) and the equipment utilization rate (over 90% for international giants and approximately 75%-80% for domestic manufacturers) are also key bottlenecks restricting the large-scale application of ALD technology.

The integrated application of third-generation semiconductor materials and ALD technology

The combination of ALD technology and third-generation semiconductors (such as GaN, SiC, diamond, etc.) is reshaping the performance boundaries of power devices and radio frequency devices. Its core application scenarios include:

The passivation layer of GaN HEMT devices: The Al₂O₃ film deposited by ALD can effectively suppress the surface state of GaN, increase the breakdown voltage of the device by 40%, and reduce the on-resistance by 25%. The PE-ALD equipment of domestic manufacturer AMEC has achieved mass production of GaN passivation layer, with a yield rate of 99.2%.

<s:1> SiC MOSFET gate oxide layer: The traditional thermal oxidation process leads to a high defect density at the SiC/SiO₂ interface (>1e12 cm⁻²). The Al₂O₃/SiO₂ stacked layer deposited by ALD can reduce the defect density to below 5e10 cm⁻², and reduce the device threshold voltage drift by 60%.

<s:1> Diamond semiconductor doping: By depositing B and P doping sources through ALD technology, atomic-level control of diamond P-type/N-type doping is achieved, laying the foundation for the preparation of high-temperature and high-frequency diamond devices.

The adaptation difficulties of ALD technology in the third-generation semiconductors lie in high-temperature compatibility (SiC substrates need to be above 1000℃ for the process) and surface sensitivity (GaN surfaces are prone to oxidation), and it is necessary to develop dedicated precursors (such as metal-organic compounds) and in-situ surface pretreatment modules.

The demand for equipment upgrades driven by advanced manufacturing processes

The 3nm and below process nodes and "beyond Moore" technologies (such as 3D integration and heterogeneous integration) impose higher requirements on ALD equipment, driving the equipment technology to upgrade in the following directions:

Atomic-level interface engineering: In the multi-bridge channel (MBC) structure of GAA transistors, ALD needs to precisely control the oxygen vacancy concentration at the HfO₂/ metal gate interface (<1e19 cm⁻³) to regulate the device threshold voltage (Vt). The latest PE-ALD device from ASML achieves dynamic monitoring of interface density of states through real-time plasma diagnostic technology.

<s:1> Co-deposition of multiple materials: In the post-Moore era, device materials have expanded from silicon-based to multi-component compounds (such as III-V group, two-dimensional materials). ALD equipment needs to support seamless switching of multiple materials such as metals (Ru, Co), oxides (HfO₂, ZrO₂), nitrides (TiN, TaN), etc., and the deposition cycle is shortened to <10 seconds per layer.

Youdaoplaceholder0 Space Atomic Layer Deposition (SALD) : The rate of the "time separation" mode of traditional ALD is limited. SALD achieves continuous deposition through "space separation", with a rate of over 100 nm/min, and is suitable for emerging fields such as flexible electronics and large-area display panels. The SALD equipment of applied materials has been verified in OLED packaging, with a yield rate of 98.5%.

The impact of semiconductor industry policies on the ALD equipment market

Reconstruction of the global semiconductor industry chain and regional policy support

Under the trend of "regionalization" in the global semiconductor industry chain, countries/regions are competing for the technological dominance of ALD equipment through policy subsidies, technological blockades and other means, forming a differentiated competitive pattern:

Table: Key Policies on ALD Equipment in Major Countries/Regions

The core policy measures and financial support targets of the country/region

China's "Opinions on Accelerating the Construction of National Hub Nodes for the National Integrated Computing Power Network" has received a local fiscal subsidy of 160 million yuan (by 2025) and a special fund of 190 million yuan from the Ministry of Science and Technology. By 2027, the domestic production rate of 28nm ALD equipment is expected to exceed 70%

The US Chips and Science Act offers a $52 billion semiconductor subsidy, with the research and development of ALD equipment accounting for 8%. By 2030, it aims to capture 60% of the global advanced ALD equipment market

The EU's "Chips Act" has allocated a 43 billion euro industrial fund, listing ALD technology as a "key enabling technology". By 2030, domestic ALD equipment production capacity is expected to account for 20% of the global total

South Korea's "K-Semiconductor Strategy" plans to invest 510 trillion won (approximately 390 billion US dollars) over a decade to lead the development of ALD equipment technology for 3D NAND/DRAM

The core of China's policy is "self-reliance and controllability". It supports the research and development of ALD equipment through channels such as the "02 Special Project" and the "Big Fund", and provides a price subsidy of 20% to 30% for the verification of domestic equipment. For instance, Shanghai offers up to 50 million yuan in research and development subsidies to ALD equipment enterprises, and Wuxi Economic and Technological Development Zone has established an ALD equipment industry fund (with a scale of 1 billion yuan). The United States has restricted the export of advanced ALD equipment to China (such as 3nm and below process equipment) through export controls, forcing China to accelerate technological autonomy.

The current situation of technological barriers and patent layout

International giants build technological barriers through patent layout, while domestic enterprises break through the blockade through "cross-licensing + evasive design". As of 2024, the global core patents for ALD equipment exceed 12,000, with ASM, TEL, and AMAT accounting for 65%. They are mainly distributed in:

<s:1> Multi-chamber integration technology (28% of patents) : For example, ASM's "modular reaction chamber" patent (US9120567B2) restricts multi-chamber parallel deposition schemes;

<s:1> Precursor delivery system (22%) : TEL's "bubble-free liquid precursor delivery" patent (JP6789012B2) ensures flow accuracy;

<s:1> Plasma control (18%) : AMAT's patent for "plasma density distribution homogenization" (US10347865B2) enhances the uniformity of the film.

Domestic enterprises' patent layout focuses on mid-to-low-end processes and emerging applications. Enterprises such as Microadmittance Nano and Yanwei Semiconductor have accumulated over 300 patents in the fields of 14nm High-k ALD and PE-ALD, but there is still a gap in core patents of advanced processes. In 2023, AMEC and TEL reached a cross-licensing agreement on ALD patents, clearing the way for domestic equipment to enter the international market.

Future growth drivers and challenges of the ALD atomic layer deposition equipment market

Expansion of emerging application scenarios: From logic chips to advanced packaging

The growth of the ALD equipment market will extend from traditional logic/memory chips to emerging scenarios, opening up a second growth curve:

<s:1> 3D NAND stacking breaks through 1,000 layers: Samsung plans to mass-produce 1,000-layer 3D NAND in 2027. The demand for ALD equipment will increase from 12 units per production line to 20 units, and the market size will grow by 15% annually.

<s:1> Chiplet advanced packaging: In packaging technologies such as TSMC CoWoS and Intel EMIB, the demand for RDL barrier layers and micro-dot bottom metallized layers deposited by ALD has soared. It is estimated that the market size of ALD equipment for advanced packaging will reach 850 million US dollars by 2025 (CAGR 45%).

Youdaoplaceholder7 MEMS and sensors: The application of ALD technology in micro pressure sensors (SiNx thin films) and inertial navigation devices (AlN piezoelectric layers) has driven the growth of ALD demand in consumer electronics and automotive electronics. The market share has reached 5% in 2024.

Supply chain risks and opportunities for domestic substitution

There are two major risks in the global ALD equipment supply chain: reliance on imported core components (such as German Pfeiffer vacuum valves and American MKS flow meters) and geopolitical restrictions (the United States' advanced policies towards China)